dc.contributor.author |
Afşin, Mehmet Ertuğ
|
|
dc.contributor.author |
Schmidt, Klaus Werner
|
|
dc.contributor.author |
Schmidt, Ece Güran
|
|
dc.date.accessioned |
2020-02-28T07:15:19Z |
|
dc.date.available |
2020-02-28T07:15:19Z |
|
dc.date.issued |
2017 |
|
dc.identifier.citation |
Afsin, Mehmet Ertug; Schmidt, Klaus Werner; Schmidt, Ece Guran, "A configurable CAN FD controller: architecture and implementation", 2017 25th Signal Processing And Communications Applications Conference (SIU), (2017). |
tr_TR |
dc.identifier.issn |
978-1-5090-6494-6 |
|
dc.identifier.uri |
http://hdl.handle.net/20.500.12416/2540 |
|
dc.description.abstract |
CAN FD is a new standard which provides fast. data rate while preserving the compatibility with CAN (controller area network). In this paper, a Configurable IP core architecture (A-CAN) which is compatible with the CAN FD standard, is proposed. Different than existing CAN/CAN FD controllers, the numbers and sizes of transmit and receive buffers of A-CAN can be configured in run time. To this end, A-CAN enables the best use of single controller hardware for different applications and enables improving the real time communication performance. A CAN communicates with the host device over SPI without any specific interface requirements. A-CAN is implemented on an FPGA Evaluation Board and its functionally is verified at a rate of 2 Mbps. |
tr_TR |
dc.language.iso |
eng |
tr_TR |
dc.publisher |
IEEE |
tr_TR |
dc.rights |
info:eu-repo/semantics/closedAccess |
tr_TR |
dc.subject |
In-Vehicle Networks |
tr_TR |
dc.subject |
CAN FD |
tr_TR |
dc.subject |
FPGA |
tr_TR |
dc.subject |
Buffer Organization |
tr_TR |
dc.title |
A configurable CAN FD controller: architecture and implementation |
tr_TR |
dc.type |
bookPart |
tr_TR |
dc.relation.journal |
2017 25th Signal Processing And Communications Applications Conference (SIU) |
tr_TR |
dc.contributor.department |
Çankaya Üniversitesi, Mühendislik Fakültesi, Mekatronik Mühendisliği |
tr_TR |